Based on the sizes of the heatsinks, it looks like Cavium is doing almost none of the work. http://www.cavium.com/OCTEON-II_CN62XX.html It’s an NPU, but not a very big one.
Pretty excited about NPUs in general. Of course we wont get our hands on this one 🙁
NPUs and FMPS seem like a nice combination instead of nickel and dime CPU. Seems the Cavium is popping up in a couple of platforms. Maybe you can get IBM to get us an open box like this to dev on 🙂
I think the lack of openness has really marginalized NPUs. Years ago I did some programming on the NP4GS3 but there was very little “buzz” around it because it was encrusted in NDAs. There was only one open NPU – the Intel IXP – and so it got 100% of the mindshare in academia even though IMO its architecture sucks. (People said they were doing NPU research but really they were doing IXP research.) Now the “traditional” NPUs have been replaced by MIPS GPNPUs (e.g. Cavium, Raza/NetLogic/Broadcom) which should be easier to program but there’s still zero public discussion and zero cool Github repos because everything is locked away behind NDAs. Even if they have technical advantages, the fact that it costs you ~$100K to find out what they are basically kills innovation. Might as well just use x86 (Intel claims Sandy Bridge can drive 100 Gbps…)
Based on the sizes of the heatsinks, it looks like Cavium is doing almost none of the work. http://www.cavium.com/OCTEON-II_CN62XX.html It’s an NPU, but not a very big one.
Pretty excited about NPUs in general. Of course we wont get our hands on this one 🙁
NPUs and FMPS seem like a nice combination instead of nickel and dime CPU. Seems the Cavium is popping up in a couple of platforms. Maybe you can get IBM to get us an open box like this to dev on 🙂
Thanks for popping in Was,
-Brent
I think the lack of openness has really marginalized NPUs. Years ago I did some programming on the NP4GS3 but there was very little “buzz” around it because it was encrusted in NDAs. There was only one open NPU – the Intel IXP – and so it got 100% of the mindshare in academia even though IMO its architecture sucks. (People said they were doing NPU research but really they were doing IXP research.) Now the “traditional” NPUs have been replaced by MIPS GPNPUs (e.g. Cavium, Raza/NetLogic/Broadcom) which should be easier to program but there’s still zero public discussion and zero cool Github repos because everything is locked away behind NDAs. Even if they have technical advantages, the fact that it costs you ~$100K to find out what they are basically kills innovation. Might as well just use x86 (Intel claims Sandy Bridge can drive 100 Gbps…)
Very interesting as always Wes. What’s your take on FPGAs moving forward?